Advances in semiconductor technologies have resulted in dramatically increased circuit packing densities and higher speeds of operation. In order to achieve such increased densities, a wide variety of evolutionary changes have taken place with respect to semiconductor processing techniques and semiconductor device structures over the years.
As technologies evolve to produce smaller and denser circuits, the evolution has also created challenges. As an example, as semiconductor devices are made to be smaller and denser, there applicability to high voltage applications have presented a challenge with respect to the breakdown voltages of the semiconductor device. As an example, a fully depleted silicon-on-insulator (FDSOI) device formed on 28 nm nodes can offer higher performance, lower power, and low drain-to-drain voltage (Vdd) as compared to a 28 nm bulk semiconductor device. However, current FDSOI devices do not include high voltage devices with high performance such as for very high frequency power amplifier applications and power management, due to an inadequate breakdown voltage in devices made with smaller process technologies. As the operating voltages applied to the transistors increase, the transistors will eventually breakdown causing an uncontrollable increase in current. Examples of the detrimental effects of the breakdown may include punch-through, avalanche breakdown, and gate oxide breakdown.